The gateware design had to be adapted to the improved hardware as we have changed the interface between the RaspberryPI management core and the FPGA. This allows us to implement in the future a PCIe connection between the RaspberryPI and the the FPGA. Part of the PCIe implementation for a different FPGA was funded by NLnet in 2023. We hope to get funding for the implementation of PCIe endpoint together with DMA data transfer for Kintex7 FPGA which we use in the 10 Gbit switch  from NLnet in 2026. This would allow to use the 10 Gbit switch as an FPGA based AI accelerator to the RaspberryPi.

NLnet also confirmed to provide 40.000 Euro funding for the development of the required gateware and software for storing data on SDcards following the fat UHS-II standard which is included as hardware into the 10 Gbit Ethernet switch.

The generation of the bitstream for the Kintex7 currently makes problems as we try to deploy a very powerful and complex gateware design with lots of different clocks on the hardware we designed. 

The implementation of the proposed management software running on the RPi CM5 is still missing as we first want to get the 10Gbit switch working with its new hardware interface to the RPi CM5 management hardware.

The switch hardware also includes Cruvi expansion connectors for high speed interfaces. In the future this can be used as a development environment for additional network functionality like a networking gateway or a real time video bridge.

NLnet also is funding the implementation of the modern VPN solution wireguard on FPGA which has the potential to be ported to our 10 Gbit switch.

With the financial support of Samsung, India does deploy 500 FPGA boards with our open source FPGA design software to teach Indian highschool kids how to design chips. This is an example of how open source FPGA software from Austria has an impact worldwide.