Profiling across circuit families and sizes

Our recent work has confirmed that compiling quantum circuits at runtime, as is currently required in most cloud-based quantum computing scenarios, can consume a large portion of the total execution time of quantum workloads. By breaking down the compilation process into its individual passes and measuring their wall-clock time, we have identified passes that “dominate” the compilation time under certain conditions. The next phase of the project will consist of a more in-depth, systematic analysis of which passes have the most significant impact on the overall execution time and when and how the circuit structure influences their behavior.

So far, we have benchmarked two canonical circuits (e.g., QFT and GHZ). What remains to be done is a systematic investigation of a wider variety of circuits, including different algorithm families, qubit numbers, gate depths, gate densities, and connectivity patterns. We measure the wall clock time per run for each circuit under identical compilation settings, e.g., with the same hardware specifications and the same degree of optimization. Through this investigation, we will determine whether the originally observed trend can be generalized and whether a small top-k set of passes consistently accounts for at least a certain percentage of the overall runtime.

Building a feature-based pass cost model

Once we have a comprehensive dataset at hand, we characterize each circuit with a vector of structural features, such as the number of qubits and gates, the ratio of two-qubit to one-qubit gates, the circuit depth, connectivity/interaction patterns, and so on. Based on these circuit-agnostic features, we attempt to create models that describe the relationship between them and the individual pass behavior. In other words, we want to answer the question of whether we can predict which passes will be most costly based solely on (a small set of) the structural properties of a quantum circuit.

If so, these models could help a user estimate costs before beginning the full compilation process. They could also help select different passes based on the circuit design to reduce the overall runtime of the total workload. A quantum cloud provider could also use cost forecasts to schedule jobs more intelligently, balance the workload, and avoid compilation time bottlenecks.

Stay tuned for more updates as we expand the benchmark suite, refine our models, and test new adaptive compilation strategies on real hardware and simulators.